Tag Archives: MIC

Intel Many Integrated Core (MIC) architecture and the UnTRIM code

Intel Many Integrated Core (MIC) architecture and the UnTRIM code, 11th UnTRIM Workshop, Trento, 19-21 May 2014.

The presentation describes the results of an investigation concerning the potential of porting the UnTRIM2 code (with subgrids, see Casulli and Stelling 2010) to the Intel MIC processors, the trade mark name Xeon Phi. Continue reading →

Potential der Intel Many Integrated Core Architektur für die Flussmodellierung — Codes UnTRIM und Telemac

Jacek A. Jankowski

This technical report (in German) concerns the assessment of porting feasibility of codes UnTRIM2 and Telemac to the Intel Xeon Phi, i.e. MIC (Many Integrated Cores) architecture. German abstract follows. Continue reading →